Author: Gerd Meister
Publications
Publication period start: 1996
Publications
Meister, Gerd (1996): Evaluation of Parallel Logic Simulation Using DVSIM. In: HICSS 1996 , 1996, . pp. 397-406. https://csdl.computer.org/comp/proceedings/hicss/1996/7324/00/73240397abs.htm